View LTC3444_269457.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

LTC3444 Micropower Synchronous Buck-Boost DC/DC Converter for WCDMA Applications DESCRIPTIO
The LTC(R)3444 is a highly efficient, fixed frequency, buckboost DC/DC converter, which operates from input voltages above, below, and equal to the output voltage. The topology incorporated in the IC provides a continuous transfer function through all operating modes, making the product ideal for a single Lithium-Ion or multi-cell applications where the output voltage can vary over a wide range. The LTC3444 has been optimized for use in 3G WCDMA applications. A unique design yields high efficiency at very low output voltages while also eliminating external components. The high speed error amplifier provides the fast transient response required to slew the RF power amplifier from standby to transmit and transmit to stand by power levels. Output overvoltage protection protects the RF power amplifier. Operating frequency is internally set to 1.5MHz to minimize external component size while maximizing efficiency. Other features include <1A shutdown current, internal soft-start, peak current limit and thermal shutdown. The LTC3444 is available in a small, thermally enhanced 8-lead (3mm x 3mm) DFN package.
, LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 6404251, 6166527.
FEATURES

Optimized Features for WCDMA Handsets Regulated Output with Input Voltages Above, Below, or Equal to the Output 0.5V to 5V Output Range Up to 400mA Continuous Output Current From a Single Lithium-Ion Cell Minimal External Components 1.5MHz Fixed Frequency Operation Internal Loop Compensation for Fast Response <25s Full Scale Output Slewing; COUT 4.7F Output Disconnect in Shutdown 2.7V to 5.5V Input <1A Shutdown Current Internal Soft-Start Output Overvoltage Protection Single Inductor, No Schottky Diodes Required Small, Thermally Enhanced 8-Lead (3mm x 3mm) DFN Package
APPLICATIO S

WCDMA Applications-3G Handsets with High Speed Data Rate Capability MP3 Players Digital Cameras
TYPICAL APPLICATIO
2.2H LTC3444 SW1 3.1V TO 4.2V VIN SHDN 4.7F GND
VOUT 0.8V TO 4.2V 340k SW2 VOUT FB VC 267k 205k 4.7F
VOUT VCONTROL
+
Li-Ion
VCONTROL DAC
3444 TA01
U
U
U
LTC3444 Dynamic Response
1V/DIV
10s/DIV VIN = 3.6V, VOUT = 0.8V TO 4.2V VCONTROL = 2.36V TO 0.28V, ILOAD = 100mA
3444 G16a
3444f
1
LTC3444
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW SHDN 1 SW1 2 GND 3 SW2 4 9 8 7 6 5 FB VC VIN VOUT
VIN,VOUT Voltages .......................................... -0.3 to 6V SW1,SW2 Voltages DC .................................. -0.3 to 6V Pulsed <100ns ............... -0.3 to 7V SHDN Voltage ................................................ -0.3 to 6V Operating Temperature (Note 2) .............. -40C to 85C Maximum Junction Temperature (Note 4) ............ 125C Storage Temperature Range .................. -65C to 125C
ORDER PART NUMBER LTC3444EDD
DD PACKAGE 8-LEAD (3mm x 3mm) PLASTIC DFN
TJMAX = 125C, JA = 43C/W, 4-LAYER BOARD JC = 2.96C/W EXPOSED PAD IS GND (PIN 9) MUST BE SOLDERED TO PCB
DD PART MARKING LBVZ
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VIN = VOUT = 3.6V unless otherwise noted.
PARAMETER Input Start-Up Voltage Output Voltage Adjust Range Feedback Voltage Feedback Input Current Quiescent Current - Shutdown Quiescent Current - Active NMOS Switch Leakage PMOS Switch Leakage NMOS Switch On Resistance PMOS Switch On Resistance PMOS Switch On Resistance Input Current Limit Reverse Current Limit Max Duty Cycle Min Duty Cycle Frequency Accuracy Error Amp AVOL Error Amp Source Current Error Amp Sink Current Internal Soft-Start Time Output OV Threshold VC = 1.5V, FB = 0V VC = 1.5V, FB = 1.5V SHDN Going High
CONDITIONS

MIN 2.55 0.5 1.19
TYP 2.65 1.22 1 0.1 700 0.1 0.1 0.19 0.22 0.4
MAX 2.75 5 1.25 50 1 1100 7 10
UNITS V V V nA A A A A A A % %
VFB = 1.22V SD = 0V, VOUT = 0V Not Including Switch Leakage Switches B and C Switches A and D Switches B and C Switches A and D Switch D VIN = 3.6, VOUT = 1V

2.5 3 70 100 1.2
3.5 82 0 1.5 65 8 230 250 1.8
Boost (%Switch C On) Buck (% Switch A On)

5.1
5.3
5.5
2
U
% MHz dB A A s V
3444f
W
U
U
WW
W
LTC3444
ELECTRICAL CHARACTERISTICS
The denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VIN = VOUT = 3.6V unless otherwise noted.
PARAMETER SHDN Threshold (On) SHDN Threshold (Off) SHDN Input Current VC Output Current CONDITIONS IC is Enabled IC is Disabled VSHDN = 3.6V VC = GND

MIN 1.4
TYP
MAX 0.4
UNITS V V A A
0.01 0.5
1 2
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC3444E is guaranteed to meet performance specifications from 0C to 85C. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls.
Note 3: Current measurements are performed when the outputs are not switching. Note 4: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure.
TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency vs VIN
85 VOUT = 1.0V 80 IOUT = 100mA
EFFICIENCY (%)
EFFICIENCY (%)
75 IOUT = 65mA 70 IOUT = 50mA
VIN = 4.4V
EFFICIENCY (%)
65
60 3.1 3.3 3.5 3.7 3.9 VIN (V) 4.1 4.3 4.5
Li-Ion to 4.2V Efficiency
100 90 80 70 VIN = 3.1V VIN = 3.6V 0.50 0.45
E/A SOURCE CURRENT (A)
FREQUENCY (MHz)
EFFICIENCY (%)
60 50 40 30 20 10 0 1 10 100 OUTPUT CURRENT (mA) VIN = 3.1V VIN = 4.4V PLOSS VIN = 4.4V
UW
3444 G03
(TA = 25C unless otherwise specified) Li-Ion to 3.3V Efficiency
0.18 0.16
Li-Ion to 1V Efficiency
90 80 70 60 50 40 30 20 10 0 1 VIN = 3.1V 10 100 OUTPUT CURRENT (mA) VIN = 3.6V VIN = 4.4V PLOSS VIN = 3.1V
100 90 80 70 60 50 40 30 20 10 0 1 10 100 OUTPUT CURRENT (mA) VIN = 3.1V PLOSS VIN = 3.6V VIN = 3.1V VIN = 4.4V
POWER LOSS (W)
0.25
0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 1000
3444 G06
VIN = 3.6V
0.20
POWER LOSS (W)
0.15
0.10
0.05
0 1000
3444 G05
Error Amp Source Current
19 17 15 13 11 9 7 VC = 1V FB = 0V -25 35 65 5 TEMPERATURE (C) 95 125
3444 G07
Operating Frequency
1.8 1.7 1.6 1.5 1.4 1.3 1.2 -55
0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 1000
3444 G04
POWER LOSS (W)
5 -55
-25
0 35 65 TEMPERATURE (C)
95
125
3444 G08
3444f
3
LTC3444 TYPICAL PERFOR A CE CHARACTERISTICS
PMOS RDS(ON)
0.30 0.30 SWITCH B 0.25 RDS(ON) ()
RDS(ON) ()
0.20
0.20
SWITCH C
DUTY CYCLE (%)
0.15
0.10 -55
-25
5 35 65 TEMPERATURE (C)
Error Amp Sink Current
400 VIN = VOUT = 3.6V VC = 2V, FB = 3.6V
VIN + VOUT CURRENT (A)
E/A SINK CURRENT (A)
390
700 650 600 550 500 -55
FEEDBACK VOLTAGE (V)
380
370
360
350 -55
-25
5 35 65 TEMPERATURE (C)
START VOLTAGE (V)
4
UW
95
3444 G09
(TA = 25C unless otherwise specified)
NMOS RDS(ON)
90
Boost Maximum Duty Cycle
0.25
85
80
0.15
75
125
0.10 -55
-25
5 35 65 TEMPERATURE (C)
95
125
3444 G10
70 -55
-25
5 35 65 TEMPERATURE (C)
95
125
3444 G11
Active Quiescent Current
800 750 VIN = VOUT = 3.6V
1.25 1.24 1.23 1.22 1.21 1.20
Feedback Voltage
95
125
3444 G12
-25
65 35 TEMPERATURE (C)
5
95
125
3444 G13
1.19 -55
-25
5 35 65 TEMERATURE (C)
95
125
3444 G14
Minimum Start Voltage
2.85 2.80 2.75 2.70 2.65 2.60 2.55 2.50 2.45 2.40 -55 -25 5 35 65 TEMPERATURE (C) 95 125
3444 G15
3444f
LTC3444
PI FU CTIO S
SHDN (Pin 1): Shutdown Function. A logic low input shuts down the IC. A logic high input enables the IC and starts the internal soft-start function by limiting the rise time of the internal PWM command. SW1 (Pin 2): Switch Pin Where the Internal Switches A and B are Connected. Connect inductor from SW1 to SW2. An optional Schottky diode can be connected from ground to SW1 for a moderate efficiency improvement. Minimize trace length to minimize EMI. GND (Pin 3): Ground Pin for the IC. SW2 (Pin 4): Switch Pin Where the Internal Switches C and D are Connected. An optional Schottky diode can be connected from SW2 to VOUT for a moderate efficiency improvement. Minimize trace length to keep EMI down. VOUT (Pin 5): Output of the Synchronous Rectifier. A filter capacitor is placed from VOUT to GND. A ceramic bypass capacitor is recommended as close to the VOUT and GND pins as possible. VIN (Pin 6): Input Supply Pin. Internal VCC for the IC. A 4.7F ceramic capacitor is recommended as close to VIN and GND as possible. VC (Pin 7): Error Amp Output. Pull VC to ground to select internal loop compensation. External compensation may be connected from VC to FB. Internal compensation will be disabled if VC is tied to an external compensation network. FB (Pin 8): Feedback Pin. Connect resistive divider tap here. The output voltage can be adjusted from 0.5V to 5V. The feedback reference voltage is typically 1.22V. GND (Pin 9, Exposed Pad): Solder to Board GND.
U
U
U
3444f
5
LTC3444
BLOCK DIAGRA
3.1V TO 5.5V VIN
A 6 GATE DRIVERS AND ANTI-CROSS CONDUCTION
+
2.5A
+ -
AVERAGE CURRENT LIMIT
OUTLOW
OUTPUT OV
3.5A
+ - + -
PWM COMPARATORS UVLO 2.65V
THERMAL SHUTDOWN
OSC
SHDN
GND 3
UVLO
VCONTROL
6
+ -
PEAK CURRENT LIMIT
PWM LOGIC AND OUTPUT PHASING
+ -
+ -
W
SW1 2 4 SW2 D 3A VOUT 5 VOUT B C PEAK REVERSE CURRENT LIMIT 1.8V
+ -
0.8V
EA
+ -
1.22V 8
FB
INTERNAL COMPENSATION GND = INTERNAL COMP FLOAT = EXTERNAL COMP VC 7
SOFTSTART THERMAL SHUTDOWN INTERNAL SOFTSTART
1
VIN
3444 BD
3444f
LTC3444
OPERATIO
The LTC3444 is a highly efficient, fixed frequency, buckboost DC/DC converter, which operates from input voltages above, below, and equal to the output voltage. The topology incorporated in the IC provides a continuous transfer function through all operating modes, making the product ideal for single Lithium-Ion or multi-cell applications where the output voltage can vary over a wide range. The LTC3444 is designed to provide dynamic voltage control in space constrained 3G WCDMA applications. Due to the high operating frequency and integrated loop compensation a complete WCDMA application requires only six additional components; input and output capacitors (ceramic), an inductor, and three resistors. The high speed error amplifier and integrated loop compensation provide the fast transient response required to slew the RF power amplifier's voltage rail from standby to transmit and transmit to standby levels in < 25s while minimizing output overshoot or undershoot. Efficiency under low output voltage conditions (standby mode) is improved by using an N-channel
U
MOSFET in parallel to P-channel MOSFET switch D. This parallel MOSFET eliminates the need for an external Schottky. Output overvoltage protection protects the RF power amplifier from voltages greater than 5.5V. When used with the proper inductance and output capacitance, the LTC3444 internal compensation is designed to be consistent with the transient requirements of a typical WCDMA application. External compensation can be used with other combinations of inductance and output capacitance, however, the transient response may not be consistent with typical WCDMA requirements. Output voltage programming is accomplished via a summing resistor input to the feedback resistive divider string. The output voltage varies inversely with the command voltage. When using the internal loop compensation, resistor R1 in the feedback resistive divider string must be 340k. There are no constraints on R1 when using external compensation. However, lower value resistors will decrease the resistance value required for programming the output voltage. Care must be taken not to load down the control voltage source.
3444f
7
LTC3444
OPERATIO
Error Amp
The LTC3444 error amplifier is a voltage mode amplifier. The internal loop compensation is designed to optimize transient response to control input change when the proper output L-C and R1 values are used. Refer to Figure 1. Internal loop compensation is selected by grounding the VC pin. The loop is designed to exhibit a single pole roll-off (-20dB/dec) with a crossover frequency of ~100KHz. External compensation can be used by connecting the compensation components from FB to VC. The VC pin must be allowed to float when using external compensation. If external compensation is used the internal compensation is automatically disabled. A Type III compensation network is typically required to meet the output transient requirements of WCDMA. During start-up, the ramp rate of the error amp output is controlled to provide a soft-start function. Refer to Figure 2.
8
U
Internal Current Limit There are two different current limit circuits in the LTC3444. The two circuits have internally fixed thresholds. The first circuit sources current out of the FB pin to drop the output voltage once the peak current exceeds 2.5A typical. During conditions where VOUT is near ground, such as during a short circuit or during startup, this threshold is cut in half, providing current foldback protection. The second circuit is a high-speed peak current limit amplifier that shuts off P-channel MOSFET switch A if the input current exceeds 3.5A typical. The delay to output for this amplifier is typically 50ns.
VOUT ERROR AMP 20A TO PWM COMPARATORS VC
+ -
R1 1.22V FB 8 R3 VCONTROL R2
INTERNAL COMPENSATION NETWORK INT ON VIN 0.5A
VOUT
VC
7
GND = INTERNAL OPEN = EXTERNAL
3444 F01
Figure 1. Error Amplifier with Compensation Select Function
3444f
LTC3444
OPERATIO
Reverse Current Limit The LTC3444 always operates in forced continuous conduction mode. The reverse current limit amplifier monitors the inductor current from the output through switch D. Once the negative inductor current exceeds 3A typical, the LTC3444 will shut off switch D. The high reverse current is required to meet the transient slew requirements for WCDMA power amplifiers. Output Overvoltage Protection The LTC3444 provides output overvoltage protection. If the output voltage exceeds 5.3V typical, P-channel MOSFET switches A and D are turned off and N-channel MOSFET switches B and C are turned on. Normal switching will
CSS
Figure 2. Soft-Start Circuitry
+ -
U
resume once the output voltage drops below ~5.1V. If the condition which caused the output overvoltage is still present the output will charge up to 5.3V again and the overvoltage cycle will be repeat. Normal output regulation will resume once the condition responsible for the output overvoltage is removed. Soft-Start The soft-start function is initiated when the SHDN pin is brought above 1.4V and the LTC3444 is out of UVLO (above minimum input operating specs). The LTC3444 is enabled but the PWM duty cycle is clamped via the error amp output. The soft-start time is internally set to 250s to minimize output overshoot. A detailed diagram of this function is shown in Figure 2.
VIN SOFT-START CLAMP ERROR AMP 20A
+ -
1.22V FB 8
VC
7
TO PWM VCI COMPARATORS ISS SHDN 1V
3444 F02
1
3444f
9
LTC3444
OPERATIO
Buck-Boost Four-Switch Control Figure 3 shows a simplified diagram of how the four internal switches are connected to the inductor, VIN, VOUT and GND. Figure 4 shows the regions of operation for the LTC3444 as a function of the internal control voltage, VCI. Depending on the control voltage, the LTC3444 will operate in either buck, buck-boost or boost mode. The VCI
VIN 6
PMOS A SW1 2
NMOS B
Figure 3. Simplified Diagram of Output Switches
10
U
voltage is a level shifted voltage from the output of the error amp (VC pin) (see Figure 2). The four power switches are properly phased so the transfer between operating modes is continuous, smooth and transparent to the user. The buck-boost region is reached when VIN approaches VOUT. The conduction time of the four switch region is typically 125ns. The three operating modes of the four switch buck-boost converter are described below. Please refer to Figures 3 and 4.
VOUT 5
88% DMAX BOOST A ON, B OFF PWM CD SWITCHES DMIN BOOST FOUR SWITCH PWM DMAX BUCK BOOST REGION
V4 (~1.16V)
PMOS D SW2 4
V3 (~0.73V) BUCK-BOOST REGION V2 (~0.49V)
NMOS C
D ON, C OFF PWM AB SWITCHES
BUCK REGION V1 (OV) INTERNAL CONTROL VOLTAGE, VCI
3444 F04
0% DUTY CYCLE
3444 F03
Figure 4. Switch Control vs Internal Control Voltage, VCI
3444f
LTC3444
OPERATIO
Buck Region (VIN > VOUT) Switch D is always on and switch C is always off during this mode. When the internal control voltage, VCI, is above voltage V1, Switch A is on. During the off time of switch A, synchronous switch B turns on for the remainder of the time. Switches A and B will alternate similar to a typical synchronous buck regulator. As the control voltage increases, the duty cycle of switch A increases until the maximum duty cycle of the converter in buck mode reaches DMAX_BUCK, given by: DMAX_BUCK = 100% - D4SW where D4SW = duty cycle % of the four switch range. D4SW = (125ns * f) * 100 % where f = operating frequency, Hz. Beyond this point the "four switch," or Buck-Boost region is reached.
U
Buck-Boost or Four Switch (VIN ~ VOUT) When the internal control voltage, VCI, is above voltage V2, but below V3, switch pair AD remain on for duty cycle DMAX_BUCK, and the switch pair AC begins to phase in. As switch pair AC phases in, switch pair BD phases out accordingly. When the VCI voltage reaches the edge of the buck-boost range, at voltage V3, the AC switch pair completely phase out the BD pair, and the boost phase begins at duty cycle D4SW. The input voltage, VIN, where the four switch region begins is given by:
VIN =
VOUT V 1- (125ns * f)
The point at which the four switch region ends is given by: VIN = VOUT(1-D) = VOUT(1-125ns * f) V
3444f
11
LTC3444
OPERATIO
Boost Region (VIN < VOUT) Switch A is always on and switch B is always off during this mode. When the internal control voltage, VCI, is above voltage V3, switch pair CD will alternately switch to provide a boosted output voltage. This operation is typical to a synchronous boost regulator. The maximum duty cycle of the converter is limited to 82% typical and is reached when VCI is above V4. CONTROLLING THE OUTPUT VOLTAGE The output voltage is controlled via a summing resistor input at the feedback (FB) resistive divider string. Refer to Figure 1. The output voltage has an inverse relation to the control voltage as shown in Figure 5. The resistor values are dependent on the desired output voltage range and the
VOUT
12
U
control voltage range. When using the internal loop compensation, VC = GND, R1 must be 340k. For external compensation R1 should be chosen first and R2 and R3 calculated from the following equations. The resistor values are given by: R3 = ( VCON(MAX ) - VCON(MIN) ) VO(MAX ) - VO(MIN) * R1
R2 = 1.22 ( VCON(MAX ) - 1.22) (1.22 - VO(MIN) ) - R3 R1
4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0.5 1 1.5 VCONTROL 2 2.5
3444 G01
Figure 5. VOUT vs VCONTROL with R1 = 340k, R2 = 249k, and R3 = 182k, VCONTROL = 0.5V to 2.5V
3444f
LTC3444
OPERATIO
Table 1. Shows some typical resistor value combinations for several VCONTROL vs VOUT voltage ranges. One percent (1%) resistor tolerances were assumed.
Table 1. Typical Resistor Values for VOUT vs VCONTROL
VCONTROL(V) MIN 0.35 0.35 0.8 0.5 MAX 2.4 2.5 2.35 2.5 0.8 0.5 0.8 0.5 VOUT (V) MIN MAX 4.2 5.0 4.2 4.2 RESISTANCE (k) R1 340 340 340 340 R2 271 210 200 249 R3 205 162 154 182
U
COMPONENT SELECTION Recommended Component Placement Figure 6. Shows a recommended component placement. Traces carrying high current should be made short and wide. Trace area at FB and VC pins should be minimized. Lead lengths to the battery should be kept short. VOUT and VIN ceramic capacitors should be placed close to the IC pins. Multiple vias should be used between layers.
VCONTROL LTC3444 VIN 1 2 SHDN SW1 FB VC 8 7 VIN 3 GND VIN 6 4 SW2 VOUT 5 VOUT
3444 F06
MULTIPLE VIAS
Figure 6. Recommended Component Placement
3444f
13
LTC3444
OPERATIO
Inductor Selection The high frequency operation of the LTC3444 allows the use of small surface mount inductors. The internal loop compensation is designed to work with a 2.2H inductor (1.5H for VIN < 3.1V). The 2.2H inductor was selected to optimize the transient response to the control input. The use of a 2.2H inductor pushes out the right half plane (RHP) zero frequency and allows the loop crossover to occur at frequencies higher than the output L-C double pole. For external compensation the inductor selection is based on the desired inductor ripple current. The inductor ripple current is typically set to 20% to 40% of the average inductor current. Increased inductance results in lower ripple current, however, higher inductance pulls in the RHP zero frequency and limits the maximum crossover frequency possible. Refer to Closing the Feedback Loop for more information on the RHP zero. For a given ripple the inductance terms are given as follows:
VIN(MIN) * ( VOUT - VIN(MIN) ) f * IOUT(MAX) * IL * VOUT
2 2
LBOOST >
Table 2. Inductor Vendor Information
SUPPLIER Coilcraft CoEv Magnetics COOPER Bussmann Murata Sumida TDK TOKO PHONE (847) 639-6400 (800) 227-7040 (636) 394-2877 (814) 237-1431 (800) 831-9172 USA: (847) 956-0666 Japan: 81(3) 3607-5111 (847) 803-6100 (847) 297-0070 FAX (847) 639-1469 (650) 361-2508 1-800-544-2570 (814) 238-0490 USA: (847) 956-0702 Japan: 81(3) 3607-5144 (847) 803-6296 (847) 699-7864 WEB SITE www.coilcraft.com www.circuitprotection.com/magnetics.asp www.coooperET.com www.murata.com www.sumida.com www.component.tdk.com www.tokoam.com
14
U
LBUCK > VOUT * ( VIN(MAX) - VOUT ) f * IOUT(MAX) * IL * VIN(MAX) H
where f = operating frequency, Hz IL = inductor ripple current, A VIN(MIN) = minimum input voltage, V VIN(MAX) = maximum input voltage, V VOUT = output voltage, V IOUT(MAX) = maximum output load current In most cases, the boost configuration will be used to determine the minimum inductance allowed for a given ripple current. For high efficiency, choose a ferrite inductor with a high frequency core material to reduce core loses. The inductor should have low ESR (equivalent series resistance) to reduce the I2R losses, and must be able to handle the peak inductor current without saturating. To minimize radiated noise, use a shielded inductor. See Table 2 for a suggested list of inductor suppliers.
H
3444f
LTC3444
OPERATIO
Output Capacitor Selection A 4.7F, X5R or X7R type ceramic capacitor should be used when using the internal loop compensation. When using external compensation, larger values of output capacitance can be used, however, larger output capacitance will increase the time needed to slew the output voltage as required in typical WCDMA applications. The bulk value of the output filter capacitor is set to reduce the ripple due to charge into the capacitor each cycle. The steady state ripple due to charge is given by:
% RIPPLE _ BOOST = IOUT * ( VOUT - VIN(MIN) ) * 100 COUT * VOUT * f
2
% RIPPLE _ BUCK = IOUT(MAX) * ( VIN(MAX) - VOUT ) * 100 COUT * VIN(MAX) * VOUT * f
where C OUT = output filter capacitor in farads f = switching frequency in Hz.
Table 3. Capacitor Vendor Information
SUPPLIER AVX Sanyo Taio Yuden TDK PHONE (803) 448-9411 (619) 661-6322 (408) 573-4150 (847) 803-6100 FAX (803) 448-1943 (619) 661-1055 (408) 573-4159 (847) 803-6296 WEB SITE www.avxcorp.com www.sanyovideo.com www.t-yuden.com www.component.tdk.com
U
In a typical application the output capacitance may be many times larger than that calculated above in order to handle the transient load response requirements of the converter. For a rule of thumb, the ratio of the operating frequency to the unity-gain bandwidth of the converter is the amount the output capacitance will have to increase from the above calculations in order to maintain the desired transient response. However, in WCDMA applications the output capacitance should be kept at a minimum to maximize the output slew rate. Refer to the Loop Compensation Networks section of this datasheet. The other component of ripple is due to the ESR (equivalent series resistance) of the output capacitor. Low ESR capacitors should be used to minimize output voltage ripple. For surface mount applications, Taiyo Yuden or TDK ceramic capacitors, AVX TPS series tantalum capacitors or Sanyo POSCAP are recommended. See Table 3 for contact information. % Ceramic output capacitors should use case size 1206 or larger. Smaller case sizes have a larger voltage coefficient that can greatly reduce the output capacitance value at higher output voltages. Input Capacitor Selection Since the VIN pin is the supply voltage for the LTC3444, as well as the input to the power stage of the converter, it is recommended to place at least a 4.7F, X5R or X7R ceramic bypass capacitor close to the VIN and GND pins. It is also important to minimize any stray resistance from the converter to the battery or other power source.
%
3444f
15
LTC3444
OPERATIO
Optional Schottky Diodes Schottky diodes across the synchronous switches B and D are not required, but provide a lower drop during the break-before-make time (typically 15ns) of the NMOS to PMOS transition, improving efficiency. Use a surface mount Schottky diode such as an MBRM120T3 or equivalent. Do not use ordinary rectifier diodes, since the slow recovery times will compromise efficiency. Closing the Feedback Loop The LTC3444 incorporates voltage mode PWM control. The control to output gain varies with operation region (buck, boost, buck-boost), but is usually ~20dB. The output filter exhibits a double pole response, as given by:
f FILTER_ POLE = (in buck mod e ) VIN Hz 2 * VOUT * * L * C OUT (in boost mod e ) f FILTER_ POLE = 1 Hz 2 * * L * C OUT
where L is in Henries and COUT is in farads. The output filter zero is given by:
f FILTER_ ZERO =
where RESR is the equivalent series resistance of the output cap.
C2
7
VC VREF R2
Figure 7. Error Amplifier with Type I Compensation
3444f
16
-
+
U
A troublesome problem when operating in boost mode is dealing with the right-half plane zero (RHP), given by:
f RHPZ =
VIN2 Hz 2 * * IOUT * L * VOUT
The RHP zero has a +20dB/dec gain typical of a zero but the -90 phase lag of a pole. This causes the loop gain to flatten out while the phase margin decreases. The only way to combat a RHP zero is to roll off the loop well before the RHP zero frequency. LOOP COMPENSATION NETWORKS A simple Type I compensation network, refer to Figure 7, can be incorporated to stabilize the loop, but at a cost of reduced bandwidth and slower transient response. To ensure proper phase margin using Type I compensation, the loop must be crossed over at least a decade before the output LC double pole frequency. The unity-gain frequency of the error amplifier with the Type I compensation is given by: f UG= 1 Hz 2 * * R1* C 2
1 2 * * RESR * C OUT
WCDMA applications demand an improved transient response to the input control voltage. In other applications, the output capacitor can be increased to meet help meet the load transient requirements.
Hz
FB
R1 8 VOUT
3444 F07
LTC3444
OPERATIO
7
VC VREF R2
Figure 8, Error Amplifier with Type III Compensation
f POLE1 f POLE2
1 Hz 2 * * R5 * C 3
80 60 40
GAIN (db)
1 = Hz 2 * * R4 * C1
20 0 -20 -40 -60 -80 1e 1e1 1e2 1e3 1e4 1e5 1e6 FREQUENCY (Hz) 1e7 fUO
1 f ZERO1 = Hz 2 * * R1* C1 f ZERO2 1 = Hz 2 * * R5 * C 2
And the unity gain frequency (fUG) of the Type III compensation is given by: f UG = 1 Hz 2 * * R1* C2
Figure 9. Frequency Response for LTC3444 Error Amplifier with a Typical Type III Compensation Network
where resistance is in ohms and capacitance is in farads. Note: Bias resistor, R2, does not affect the Pole/Zero placement.
-
+
However, due to the output voltage slewing requirements found in WCDMA applications the output filter capacitor must be minimized. To maximize the transient response, while minimizing the output capacitance, a higher bandwidth, Type III compensation is required. A Type III compensation network, refer to Figure 8, has a double zero to cancel the double pole of the output LC filter and a double pole to compensate for the ESR zero and RHP zero of the boost topology. In addition to the double poles, the Type III network also has a single pole at DC. The Type III compensation provides a maximum 135 phase boost and allows the loop crossover to occur at frequencies higher than the output LC. Refer to Figure 9. Referring to Figure 8, the location of the poles and zeros are given by: Assume C2 >> C3, R1 >> R4.
U
C3 C2 R5 C1 R4 R1 8 VOUT FB
3444 F08
360 270 180
PHASE (DEG)
90 0 -90 -180 -270 -360 1e8
3444 G02
3444f
17
LTC3444
TYPICAL APPLICATIO S
Example of Internal Compensation Transient Response for a Command Voltage Change LTC3444 Dynamic Response
VOUT 1V/DIV
VOUT VCONTROL
10s/DIV VIN = 3.6V, VOUT = 0.8V TO 4.2V VCONTROL = 2.36V TO 0.28V, ILOAD = 100mA
3444 G16a
Internally Compensated WCDMA Application. Singe Cell, 2.7V to 4.2V Input, 0.8V to 4.2V at 400mA Output.
1.5H L1 LTC3444 SW1 2.7V TO 4.2V VIN CIN 4.7F SHDN GND VOUT FB VC R2 267k R3 205k SW2
+
Li-Ion
CIN = MURATA:GRM31CR61C475K COUT = MURATA:GRM31CR61C475K L1 = COOPER BUSSMAN SD12-2R2
18
U
LTC3444 Dynamic Response
1V/DIV
VCONTROL 10s/DIV VIN = 3.6V, VOUT = 4.2V TO 0.8V VCONTROL = 0.28V TO 2.36V, ILOAD = 100mA
!""" /%
VOUT 0.8V TO 4.2V R1 340k COUT 4.7F
VCONTROL DAC
3444 TA02
3444f
LTC3444
TYPICAL APPLICATIO S
Single Li-Ion, 3.1V to 4.2V Input, 3.3V at 400mA Output with Internal Compensation
2.2H L1 LTC3444 SW1 3.1V TO 4.4V VIN CIN 4.7F SHDN GND VOUT FB VC R2 200k SW2
+
Li-Ion
CIN = MURATA:GRM31CR61C475K COUT = MURATA:GRM31CR61C475K L1 = COOPER BUSSMAN SD12-2R2
PACKAGE DESCRIPTIO
3.5 0.05 1.65 0.05 2.15 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.38 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS PIN 1 TOP MARK (NOTE 6)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
U
VOUT 3.3V AT 400mA R1 340k COUT 4.7F
3444 TA04
DD Package 8-Lead Plastic DFN (3mm x 3mm)
(Reference LTC DWG # 05-08-1698)
R = 0.115 TYP 5 0.675 0.05 0.38 0.10 8
3.00 0.10 (4 SIDES)
1.65 0.10 (2 SIDES)
(DD8) DFN 1203
0.200 REF
0.75 0.05
4 0.25 0.05 2.38 0.10 (2 SIDES)
1 0.50 BSC
0.00 - 0.05
BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE
3444f
19
LTC3444
TYPICAL APPLICATIO
3.1V TO 4.2V VIN CIN 4.7F SHDN GND VOUT FB VC R5 47.5k
+
Li-Ion
CIN = MURATA:GRM31CR61C475K COUT = MURATA:GRM31CR61C475K L1 = COOPER BUSSMAN SD12-3R3
RELATED PARTS
PART NUMBER LTC3403 LTC3408 LTC3440 LTC3441 LTC3442 LTC3443 DESCRIPTION 1.5MHz, 600mA, Synchronous Step-Down Regulator with Bypass Transistor 1.5MHz, 600mA, Synchronous Step-Down Regulator with Bypass Transistor Up to 2MHz, 600A, Synchronous Buck-Boost DC/DC Converter 1MHz, 1.2A, Synchronous Buck-Boost DC/DC Converter Up to 2MHz, 1.2A, Synchronous Buck-Boost DC/DC Converter 600MHz, 1.2A Synchronous Buck-Boost DC/DC Converter COMMENTS 96% Efficiency, VIN: 2.5V to 5V, VOUT: 0.3V to 3.5V, ISD <1A, (3mm x 3mm) DFN Package 96% Efficiency, VIN: 2.5V to 5V, VOUT: 0.3V to 3.5V, ISD <1A, (3mm x 3mm) DFN Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V, ISD <1A, IQ = 25A, 10-Lead MS Package 95% Efficiency, VIN: 2.5V to 5.5V VOUT(MIN) = 2.5V, ISD <1A, IQ = 25A, 12-Lead (4mm x 3mm) DFN Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V, ISD <1A, IQ = 25A, 12-Lead (4mm x 3mm) DFN Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 2.5V, ISD <1A, IQ = 25A, 12-Lead (4mm x 3mm) DFN Package
3444f
20
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
U
Externally Compensated WCDMA Application. Singe Cell, 3.1V to 4.2V Input, 0.8V to 4.2V at 400mA Output.
3.3H L1 LTC3444 SW1 SW2 C1 10pF C2 220pF R2 267k VOUT 0.8V TO 4.2V R4 47.5k R1 340k COUT 4.7F C3 10pF R3 205k DAC VCONTROL
3444 TA03
LT 1105 * PRINTED IN THE USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2005

▲Up To Search▲

Price & Availability of LTC3444

	To Download LTC3444 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .